SDL-News: Output semantics, "several possible paths"

Subject: SDL-News: Output semantics, "several possible paths"
From: Cris Fuhrman (
Date: Fri May 30 2003 - 19:46:47 GMT

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Sorry if this is a frequently asked question, but I'm struggling with how
OUTPUT works in the following context (sorry I don't have a picture, but you
can draw it quite easily):

Blocks B1 and B2 are connected by a unidirectional channel C1 from B1 to B2.
Process P1B1 is in B1 and can send signals out of B1 over C1 (i.e., there is
a signal route connecting it to the port for C1).
Processes P1B2 and P2B2 are in B2 and both can receive signals over C1 using
different signal routes connected to the same port (the endpoint of C1).
I consider that P1B2 and P2B2 can receive identical signals, which are by
the way the same on all signal routes/channels.

Because the two processes in B2 are connected to the same port of C1 and can
receive the same signals, I receive a warning on my outputs from P1B1 that
there are "several possible paths" (Telelogic Tau). Indeed during
simulation, it's always the first process that is the destination of a
signal, even if the other one is ready to receive it and the first is not.
This results in a deadlock in my system.

It seems that SDL semantics are such that at the moment a signal is output,
the destination process (even among many possible ones within the remote
block) must be known (or will be decided nondeterministically if ambiguous).
Again, Laurent Doldi's book, SDL Illustrated, provides clarification on this
in Figure 94, the summary of output behavior. I must admit, however, that
this is deceiving to me: a channel is intended to model delays in messages
between blocks. Why can't the destination process be decided within the
destination block (where the signal routes are multiplexed on the channel)
rather than within the sending process? A block is an abstraction, and thus
it would be useful indicate it as the abstract receiver of a signal. There
seems to be no way to do this in SDL.

This leads me to the following question. How does the FIFO queue of the
channel (C1) relate to the FIFO queues of each process (P1B1 and P2B2)?
Laurent Doldi's book implies that a channel has its own FIFO queue to delay
messages and that processes have them as well.

I realize I can avoid the ambiguity by clarifying which processes receive
which signals inside B2, (i.e., not overlapping the signals on the
multiplexed signal routes). There are cases when this is not possible. I ran
into this trouble when I was trying to make abstractions about signals using
CHOICE (see my last question about error modeling).

Have a nice weekend everyone!


Prof. Christopher FUHRMAN
École de technologie supérieure
Montréal, Québec, Canada H3C 1K3
+1 514 396 8638

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