MSC-News: operators and gates in MSC2000

Subject: MSC-News: operators and gates in MSC2000
From: Lennard Kerber (
Date: Thu Oct 25 2001 - 15:18:59 GMT

The originator of this message is responsible for its content.
----From Lennard Kerber <> to mscnews -----

Dear MSC-community,

this is a question on gates and operators regarding the current
standard of MSC, MSC2000.

If a basic MSC A has one instance "i" and one gate "out_m", what are the
gates of
A par A
A seq A

Do these operators produce ambiguous <gate name>-s, which cannot be
referenced (1.6.5, STATIC REQIREMENTS)?

Lets consider a second MSC B with one instance "j" and one gate

Let MSC C be:

msc C
inst i;
inst j;

i: instance;
j: instance;
i: reference X: A seq A;
j: reference Y: B par B;
i: endinstance;
j: endinstance;

"By means of message name identification (...) the <reference
gate interface> also defines the direct message connection between two
MSC references." (1.9.3, SEMANTICS)

Does this statement apply here?

Have we now specified two sequential sends on instance "i" and two independent
receives in a coregion on instance "j"?

Best regards

Lennard Kerber

University Erlangen-Nuremberg, Institute for Computer Science 7, Martensstr. 3,
D-91058 Erlangen, Germany, Phone: (49)9131/85-27697, Fax: (49)9131/85-27409

----End text from Lennard Kerber <> to mscnews -----

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