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Belina, Hogrefe (edits Reed)

4.1 Signal input queue

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Every process instance  has its own input queue, which normally acts on a First In First Out (FIFO) basis. Any signal arriving at the process and belonging to its so-called complete valid input signal set is put into the input queue, see figure 22. In fact the complete valid input signal set defines those signals that the process is prepared to accept and it is not allowed for any other signals to be sent to the process. For an output to contain a signal that is delivered to the process, the signal must be mentioned on the communication paths leading to the process, or in an input of the process (or in a specific construct - not detailed here - for defining other valid signals). This is because the complete valid input signal set is derived from this information. Processes in the environment are required to behave as SDL-88 processes, so the environment also only outputs signals that a process can receive.

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Figure 22: Process communication
Note: Not an SDL-88 diagram.

Signals can be received in the input queue at any time, regardless of whether the process is in a state or interpreting a transition.

For each state of a process (and each state of any contained procedure), each signal in the complete valid input signal set either leads to a transition or the signal is marked as 'saved' in this state. It is important to note that saving a signal is a property of a state: a save applies to the state and signal combination, and does not apply to the same signal in another state (whether the signal is saved in the other state is a property of that state). For example, in figure 23 signal C is saved in state S, as shown by the signal name C in the save symbol (the trapezoid shape). A save symbol is always attached to a state symbol and never has a flow line leading from it. C is saved in state T only if C is shown in a save symbol attached to the state T.

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Figure 23: Example of the use of the save construct
Note: Fragment from an SDL-88 process diagram

When a state is entered or while a process is in a state and receives a signal, the input queue is examined to see if there are any signals that are not saved for that state. If there are only signals that are saved for that state in the input queue, nothing happens and the process remains in the state.

If in a given state the input queue is not empty and there are signals for that state that are not saved, the first such signal (in FIFO order) is removed from the queue (it is consumed), and initiates a transition. If the transition simply leads back to the same state with no other action, the signal is effectively discarded. Figure 24 shows an example. Discarding a signal is such a common case that there is a short-hand for this - see 'Implicit transition

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Figure 24: Input queue mechanism of a process
Note: Annotated fragment of an SDL-88 process diagram

Let us consider the process of figure 24 in state S1. The input queue contains the signals of type a, d, a, and b, in the that order. The signals of type a and d can initiate a transition. A signal of type a is first in the input queue. It is removed from the queue, and the process performs the transition to state S2. Now the signal of type d is first in the queue. Since the transition for d leads directly back to S2 with no action, it is effectively discarded. The next signal is of type a, which can initiate a transition from state S2 to some other state (not specified in this fragment).

Timers also generate signals in the process input queue. If timer T is activated by SET (x, T) to the expiration time x, at time x (assuming this is after the time of the SET), a signal of type T is put into the input queue of the process. If at time x the input queue already contained signals of type a, b and c, these will stay in the input queue before signal T. Any signals that arrive after time x (such as the signals of type d and c in figure 25) are placed after the signal of type T. Normally the timer signal T is consumed by the process after all other signals which were the queue already at time x. That implies that it cannot be guaranteed that the process will actually be stimulated exactly at time x, but some time after x. If, after the signal T has been put into the queue, a RESET(T) construct is interpreted, T is removed from the queue at once.

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Figure 25: The timer mechanism
Note: Not an SDL-88 diagram.

If a process is waiting in a state and the only signal that is not saved is a timer signal, the process will logically enter the transition for the timer as soon as it expires. However, although the process is logically in the transition, in reality it may be later before anything happens if the process is relying on some implementation resource such as a processor shared and scheduled between processes.

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